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With the emergence of large arrays of high-functionality pixels, it has become critical to characterize the performance non-uniformity of such arrays. In this paper we characterize a 160×128 array of complex pixels, each with a single-photon avalanche diode (SPAD) and a time-to-digital converter (TDC). A study of the array's non-uniformities in terms of the timing resolution, jitter, and photon responsivity...
We report on the design and characterization of a 32 times 32 time-to-digital converter (TDC) array implemented in a 130 nm imaging CMOS technology. The 10-bit TDCs exhibit a timing resolution of 119 ps with a timing uniformity across the entire array of less than 2 LSBs. The differential- and integral non-linearity (DNL and INL) were measured at plusmn 0.4 and plusmn1.2 LSBs respectively. The TDC...
A Time-to-Amplitude Converter (TAC) with embedded analog-to-digital conversion is implemented in a 130-nm CMOS imaging technology. The proposed module is conceived for Single-Photon Avalanche Diode imagers and can operate both as a TAC or as an analog counter, thus allowing both time-correlated or time-uncorrelated imaging operation. A single-ramp, 8-bit ADC with two memory banks to allow high-speed,...
A new integration based fluorescence lifetime imaging microscopy (FLIM) called IEM has been proposed to implement lifetime calculations. A real-time hardware implementation of this IEM FLIM algorithm suitable for a single photon avalanche diode (SPAD) array in 0.13 mum CMOS technology is now implemented on FPGA. A widefield microscope was adapted to accommodate the array and test it on biological...
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