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As the progression of 45/40nm ELK devices into mainstream semiconductor assembly manufacturing process increases, the drive to achieve adoption without major changes to process and equipment infrastructure while meeting the superior yield necessary is high. The main goal of this article is to share learning's and provide solutions for integration of 45/40nm ELK devices into Flip Chip and Wire Bond...
Copper pillar bumping is a promising solution to cope with the challenges which flip chip packages face when bump pitch size keep shrinking. A large FCBGA (flip chip ball grid array) package for 45 nm Cu/Low-K device with Cu pillar bumps is chosen to investigate the package reliability. Finite element models have been built with multi-level sub-modeling technique to consider the detailed Cu/Low-K...
In this paper, a heat spreader attachment with indium solder for high-power flip chip-in-package application was investigated. The Cu heat spreader was metallized with Ni/Au and the flip chip die backside metallization was Ti/Au. A low voiding attachment process was achieved with vacuum soldering. The Au thin film was converted into AuIn2 completely after initial soldering, but no intermetallic compund...
Flip chip packaging of ultra fine pitch integrated circuits (ICs) on organic substrates aggravates the stress-strain concerns, requiring a fundamentally different system approach to interconnections, underfill, interfaces, and the substrate. This work demonstrates a novel interconnection solution with excellent reliability for ultra-fine pitch (~30 mum) silicon (Si) on organic first level interconnections...
One promising application of CNTs in microelectronics is to use vertically aligned CNT (VACNT) arrays as novel thermal interface materials (TIMs). No doubt that the vertical alignment makes the best of the extremely high longitudinal thermal conductivity of individual CNTs; however, it is the CNT/substrate interface that exerts the main restriction on phonon transport through a TIM layer. There are...
The paper proposes a micromachined antenna on a silicon substrate for aerospace applications. The research focuses on the feasibility of fabricating antennas using standard fabrication and 3D integration techniques to develop a single chip solution for wideband/multiband communication devices. The antenna reported in this paper is designed to work between 30-150 GHz, for applications of high bandwidth...
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