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The increase of luminosity foreseen for the future upgrades of the Large Hadron Collider at CERN will require the complete redesign of the Front-End electronics in all the experiments. One of the goals of the RD53 collaboration is the development of a full set of radiation-tolerant IP-cores in view of the design in 2016 of the first prototype of the new Front-End circuit for the pixel detectors of...
The new FF-LYNX communication protocol, aiming at the fulfillment of non-homogeneous latency and bandwidth requirements of future High Energy Physics experiments, as well as its implementation into IP Cores available for ASICs development, are described in this paper. The first test-chip implementing FF-LYNX IP-Cores has been designed in the IBM 130 nm CMOS technology, adopting radiation hardening...
The FF-LYNX project aims at the definition of a flexible protocol for the distribution of Timing, Trigger and Control (TTC) signals and for the readout in future High Energy Physics (HEP) experiments and its implementation in radiation tolerant and low power interfaces designed and developed in standard CMOS technologies (130 nm-90 nm) and available as IP cores to designers of integrated circuits...
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