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This paper describes a SRAM designed for space and nuclear physics applications. The device has been designed in a commercial 180 nm CMOS technology using RHBD techniques. Measurement on prototype samples under radiation demonstrate immunity to total dose and latch-up, and an adequate level of hardness with respect to single event effects.
A 512 kbit static random access memory has been designed and fabricated in a single-poly, six-metal 180 nm CMOS technology, with 1.8 V supply. The circuit has been designed to be radiation hard. The basic memory cell is a six transistor cell with a Miller capacitor between the internal latch nodes, to mitigate single event upset. Architectural and circuital solutions are also proposed to mitigate...
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