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A low-voltage operational amplifier design in a standard CMOS process is presented for operation at ±0.4 V. The design incorporates a low voltage level shift current mirror using forward body-biased MOSFETs limited to a maximum of 0.4 V to minimize latchup and hot carrier effects. Some of the measured performances are as follows: 58 dB open-loop gain, 30 kHz bandwidth, 50° phase margin and 80 μW power...
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