The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper addresses the impacts of signal slew time and signal skew variations on delay uncertainty and cross talk noise in coupled inductive lines for different switching patterns. Our findings reveal that delay variation in a victim line always increases with the reduction of signal slew time and increase in signal skew. We also observe that cross talk noise reduces with increasing signal skew,...
With aggressive scaling of technology, and corresponding increase of circuit density interconnect has become the most critical factors that influence timing characteristics of integrated circuits performance. This is due to increasing length and aspect ratio of interconnect lines leading to growing capacitive and inductive coupling. In this paper, the effects of capacitive and inductive coupling on...
With the continuous increase of circuit density, interconnect length, and aspect ratio, the influence of capacitive and inductive coupling on timing characteristics of integrated circuits has become very critical. In this paper, the effects of capacitive and inductive coupling on delay uncertainty and clock skew have been analyzed. Analytical observations and simulation results show that coupling...
With aggressive scaling of CMOS technology, different performance parameters: latency, bandwidth, repeater power consumption and area, and delay variation of global interconnects are not scaling accordingly with those of devices and local interconnects. There have been various optimization schemes to minimize the discrepancy of performance between the devices and global interconnect lines. But these...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.