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Continued increase in variability is a challenge for SRAM scaling into sub-22 nm nodes, and presents an opportunity for the introduction of alternate technologies. In this work, the performance and threshold-voltage variability of vertical SOI finFETs are compared against those of planar fully depleted (FD) SOI MOSFETs with thin buried oxide, and are presented as an alternative to planar bulk CMOS...
The performance and threshold-voltage variability of vertical SOI FinFETs are compared against those of planar fully depleted SOI MOSFETs with thin buried oxide, via three-dimensional device simulation with atomistic doping profiles and gate line-edge roughness, for the 22 nm CMOS technology node (25 nm gate length). Compact modeling is then used to estimate six-transistor SRAM cell performance metrics...
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