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Deep level transient spectroscopy was used to study carrier traps induced in n + -polycrystalline-silicon/90 9 -thick SiO 2 /p-type silicon material-system capacitors. The capacitors were fabricated using a 0.50 μm complementary metal-oxide-silicon (CMOS) process flow. The capacitor structures were subjected to constant-voltage Fowler-Nordheim (FN) stressing at temperatures between...
This paper reports on the results of a study performed to compare the effects of charging damage and inductive damage to 0.5 μm n-channel MOSFETs arising from plasma etching at the gate-definition etch and metal-1 etch levels, respectively. The MOSFETs were fabricated on 200 mm p/p + silicon wafers using a full CMOS process. The gate-definition etch step was performed using a chlorine-based...
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