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Rewiring is a logic restructuring technique proved to possess a theoretically complete capability for logic transformations. This technique can be even more powerful if well integrated with today's EDA flow for deep-submicron technology where wiring delay well dominates. In this paper, we will show that a structural factor yielding rewiring patterns is probably mainly rooted from the nature of fanout-reconvergent...
This work presents a novel, accurate, and fast post-layout logic perturbation method for improving LUT-based FPGA routing without affecting the placement. The ATPG-based rewiring techniques are used to design the rewiring engine, which is embedded into VPR, the most powerful academic FPGA CAD tool currently. Compared with VPR's high-quality results, our method can reduce critical path delay by up...
Traditionally, the circuit partitioning is done by modeling the circuit as a graph and the partitioning is carried out without altering the circuit itself. Applying the technique of circuit rewiring, the partitioning can be further improved by doing some local logic perturbation along the cut-line to drag the solution out of some local minimal. In this paper, we propose an effective coupling scheme...
The well-known ATPG-based alternative wiring technique, RAMBO, has been shown to be very useful because of its proven powerfulness and flexibility in attacking many design automation problems (e.g. logic optimization, circuit partitioning, and post-layout logic transformation, etc.). Since the ATPG based alternative wire locating procedure is the center engine for all its applications, speeding up...
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