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This work presents superb chip-level reliability of a BE-SONOS charge trapping NAND fabricated in both 75nm and 38nm half-pitches. Without any error correction (ECC) >;100K P/E cycling endurance for SLC and >;3K endurance for MLC are obtained using a novel non-cut SiN trapping layer. Key process integration strategies are discussed, including barrier and trapping layer engineering, p-well and...
For Solid-State Drive (SSD) applications cycling endurance of NAND flash is a critical challenge. In this work the endurance reliability of BE-SONOS NAND is thoroughly examined. Using dual CV/IV tests the impact of interface state (Dit) generation/annealing and real charge trapping (Q) on the endurance degradation has been clearly identified. For BE-SONOS with pure thermal oxide O1, the endurance...
Source/Drain (S/D) dopant concentration related reliability issues including erase speed degradation, sub-threshold swing (SS) increase, and program/erase (P/E) cycling induced low threshold voltage (VT) state drift and on-state current (ION) reduction are carefully examined in charge trapping (CT) NAND flash memories. Residual charges above S/D junctions has been identified as a dominant factor and...
The present study investigates the charge trapping characteristics of Si-rich nitride thin films in detail by using the gate-sensing and channel-sensing (GSCS) method. Analytical results indicate that thicker (>7 nm) nitride thin films are fully-capturing; the trapped electrons are distributed in the center of the nitride, and the charge centroid is independent of the N/Si ratio. However, thinner...
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