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This research paper observes dynamic crosstalk delay for different single and bundled carbon nanotube (CNT) structures. These CNT structures are implemented by using three coupled line bus architecture. HSPICE simulations are performed for different single and bundled single-walled and double-walled CNT (SWCNT and DWCNT) structures. A bundled DWCNT shows approximately 90.8% and 60.4% improvement in...
This research paper introduces a new modeling approach for different bundled CNT structures. Based on the arrangements of single- and multi-walled CNTs in bundle, two different structures of mixed CNT bundles (MCBs) are proposed. Performance in terms of propagation delay is compared between different bundled CNT structures by using a driver-interconnect-load (DIL) system. It has been observed that...
Multi-layer graphene nanoribbon (MLGNR) can be considered as an emerging interconnect material in current deep-submicron and nano scale technology. This research paper presents an equivalent RLC model for MLGNR interconnects that is primarily based on the geometry. Using the RLC model, propagation delay, power dissipation and power-delay product are analyzed for different number of layers in MLGNR...
Over the past years complexity of PCB board and the surface mount technology has increased by leaps and bounds. This limits the use of traditional in-circuit test techniques for testing of such boards. This paper addresses the various issues of board level interconnect testing using Boundary Scan architecture. This work implements BIST using Boundary Scan technique. A new Algorithm is developed to...
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