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In Wireless Sensor Networks (WSNs), because sensor nodes do not equip with tamper resistance hardwares, they are vulnerable to the capture and compromise performed by the adversary. By launching the node replication attack, the adversary can place the replicas of captured sensor nodes back into the sensor networks so as to eavesdrop the transmitted messages or compromise the functionality of the network...
In this paper, a stochastic computation (SC) based hardware implementation for 4-point DCT in the emerging High Efficiency Video Coding (HEVC) standard was provided. HEVC employs integer DCT with larger transform coefficients than the preceding standards. Hence the multipliers and adders therein are also more hardware consuming. With SC theory applied to DCT hardware design, the circuit implementation...
With the growing size of modern designs and more strict time-to-market constraints, design errors unavoidably escape pre-silicon verification and reside in silicon prototypes. As a result, silicon debug has become a necessary step in the digital integrated circuit design flow. Although embedded hardware blocks, such as scan chains and trace buffers, provide a means to acquire data of internal signals...
With the growing size of modern designs and more strict time-to-market constraints, design errors can unavoidably escape pre-silicon verification and reside in silicon prototypes. Due to those errors and faults in the fabrication process, silicon debug has become a necessary step in the digital integrated circuit design flow. Embedded hardware blocks, such as scan chains and trace buffers, provide...
Silicon debug poses a unique challenge to the engineer because of the limited access to internal signals of the chip. Embedded hardware such as trace buffers helps overcome this challenge by acquiring data in real time. However, trace buffers only provide access to a limited subset of pre-selected signals. In order to effectively debug, it is essential to configure the trace-buffer to trace the relevant...
Since pre-silicon functional verification is insufficient to detect all design errors, re-spins are often needed due to malfunctions that escape into the silicon. This paper presents an automated software solution to analyze the data collected during silicon debug. The proposed methodology analyzes the test sequences to detect suspects in both the spatial and the temporal domain. A set of software...
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