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This paper presents a Vector DMA Cache (VDC)scheme between the DMA bus and the Vector Memory (VM) in vector DSPs. The VDC can effectively reduce the VM access counts from the DMA requests and decrease the VM access conflicts. The VDC is specially designed for the DMA and not for the CPU, so it has some unique techniques which differ from the traditional CPU cache scheme. The main techniques of the...
Single-core DSP becomes more and more difficult to meet the demand of some application-specific fields, such as 3G mobile communication, consumer electronic systems and intelligent control devices. Recently, Multi-core DSP has received much concern and is believed to be an effective method to improve performance. QDSP is a multi-core DSP SoC developed by us. In this paper we present the design and...
Multi-Core Digital Signal Processors (MC-DSPs) often suffer from limited memory bandwidth and long access latency caused by shared-memory structures. Data forwarding is an efficient data speculation technique to hide memory access latencies. This paper proposes a new Data Stream Clustered Forwarding (DSCF) technique for MC-DSPs in shared-memory structures. DSCF combines data streams forwarding operations...
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