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A DC bias board with 9 separate output voltages is proposed for high precision and noise sensitive measurements. The measured results demonstrated an improved baseband noise up to 30 dB at 20 kHz compared with the laboratory power supplier. A voltage-controlled oscillator (VCO) in CMOS is used to benchmark the impact of power supply noise on circuit performance. The proposed bias board achieves a...
A Ku-band voltage-controlled oscillator (VCO) with a low phase noise is presented in this paper. By increasing the third-harmonic of the fundamental frequency, the transformer-based topology can enforce a pseudo-square voltage waveform in the LC tank to reduce the phase noise. Implemented in a 90-nm standard CMOS technology, the VCO exhibits an average phase noise of −117.2 dc/Hz at 1 MHz offset over...
In this letter, a wide tuning range W-band phase-locked loop (PLL) in 90 nm CMOS is presented. A novel frequency tripling topology with a single cross-coupled pair and a dual tank is proposed for the voltage-controlled oscillator (VCO) to achieve wide tuning characteristics under low power consumption. The locking range of the PLL at the fundamental tone is 25.4–29.7 GHz, and an excellent tuning range...
A 9 GHz low phase noise class-C voltage controlled oscillator (VCOs) with an 8-shaped transformer configuration using 0.18-μm CMOS technology is presented. By utilizing the 8-shaped transformer, the proposed class-C VCO can be operated at reduced dc power consumption while maintaining circuit performance in terms of phase noise and limiting EMC (Electro-Magnetic Compatibility) issues when the symmetrical...
An effective coupling topology for multi-phase oscillators is proposed and demonstrated in a standard 90nm CMOS technology. Compared with the conventional parallel or series coupling methods, the PMOS-source-follower coupled (PSFC) technique with the coupling transistors operated in the cut-off region can significantly reduce the flicker noise and hence the phase noise of VCO. The proposed PSFC QVCOs...
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