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In this paper, the impact of three dimensional effect of multi-finger layout on Variation of Lateral Doping (VLD), the Variation of Lateral Thickness (VLT) and Reduced Surface Field (RESURF) LDMOS is explored. These devices are compared on the basis of breakdown voltage and on-state resistance. The simulation indicates that compared with VLT and conventional RESURF LDMOS, the breakdown voltage of...
This paper proposes a novel high-voltage LDMOS with Folded Drift Region (FDR) structure. The structure extends the effective length of the current path in the limited drift region length, and uniformthe electric field profile in order to have a high breakdown voltage. The structure parameters are optimized and the characteristics are investigated by a 2D device simulator MEDICI. The simulation results...
A new SOI lateral high voltage device with gradient buried oxide layer is proposed to achieve uniform lateral surface electric field and high breakdown voltage. The gradient buried oxide layer leads to a linearly increasing drift-region thickness from the anode side to the cathode side, which increases the drift doping concentration and breakdown voltage at the same time. Compared to the conventional...
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