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The current density-voltage (J-V) characteristics of an organic layer sandwiched between two electrodes were simulated by using the space-charge-limited current (SCLC) model and the trap-assisted tunneling (TAT) model taking into account the leakage current paths. The experimental J-V curves of the Al/Alq3/indium-tin-oxide (ITO) and the Al/mCP/ITO devices fabricated by thermal evaporation were in...
Nanoscale charge trap flash (CTF) memory devices with a metal spacer layer were designed to decrease the interference effect and to increase the fringing field effect and the coupling ratio. The optimum metal spacer depth of the memory devices was determined to enhance the device performance of the memory devices. The drain current and the threshold voltage shifts of the CTF memory devices were increased...
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