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Heterogeneous computing with hardware accelerators is a promising direction to overcome the power and performance walls in traditional computing systems. CPU-accelerator integrated architectures, such as CPU with ASIC or FPGA based accelerators, are able to provide customized processing according to application requirements and are thus particularly attractive to speed up computation-intensive applications...
Fine-grained runtime power management techniques could be promising solutions for power reduction. Therefore, it is essential to establish accurate power monitoring schemes to obtain dynamic power variation in a short period (i.e., tens or hundreds of clock cycles). In this paper, we leverage a decision-tree-based power modeling approach to establish finegrained hardware power monitoring on FPGA platforms...
In this paper, we propose a Performance Enhancement Guaranteed Cache (PEG-C) to ensure performance benefit in the worst case while achieving as good average-case performance as a regular hardware-controlled cache. Our experiments indicate that with a small number of preloaded data and a simple hardware extension, the PEG-C can guarantee performance enhancement in the worst case while achieving the...
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