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We have developed a thin, reliable, low-thermal-resistance LSI packaging technology by embedding a high-pin-count LSI chip into thin build-up layers supported by Cu plate. The embedded LSI chip is a microprocessor with approximately 1500 pads and a thickness of 50 μm, and it is completely laminated by the first build-up epoxy resin. The total package thickness is only 0.71 mm including a 0.5-mm-thick...
Design techniques for an ultra-thin LSI package embedding a high-pin-count LSI chip in the thin package substrate have been developed to achieve the excellent electrical performance, as well as low warpage and high heat removal. The embedded chip package we designed is 27 mm by 27 mm in size and 0.71 mm in thickness with a heat spreader. The package is attained with only three metal layers against...
We have developed a thin, low-thermal-resistance LSI package by embedding a high-pin-count LSI chip into ultra-thin build-up layers supported by Cu plate. The embedded LSI chip is a microprocessor with approximately 1500 pads and a thickness of 50 mum, and it is completely laminated by the first build-up epoxy resin. The total package thickness is only 0.71 mm including a 0.5-mm-thick Cu plate for...
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