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Intelligent wearable devices and the Internet of things (IoT) require on-chip SRAM macros with (1) compact area to reduce costs; (2) single supply voltage (VDD) and low minimum VDD (VDDmin) to reduce power consumption; and (3) sufficient speed to facilitate real-time computing. 6T SRAM is compact, but suffers write failure and half-select (HS) disturbance in read/write cycles at low VDD. Previous...
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