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The energy consumption of digital systems can be greatly reduced by applying adiabatic logic (AL). Making best use of AL requires a dedicated system design regarding the inherent characteristics of AL. In this paper we investigate the CORDIC architecture, that can be used for various signal processing algorithms and is preeminently suitable for AL. For fast functional testing, we propose a methodology...
Fine-grained sleep transistor circuits are demonstrated with 0.12 /spl mu/m 16 b MAC (multiply-accumulate unit). Standby power is reduced by a factor of 5500 at 85/spl deg/C with speed reduction of 5%. Charge recycling reduces the minimum sleep time by 25%. Dynamic power dissipation decreases by 16% activating a fraction of the switch in slow mode. Double switching inhibits power-on glitches and reduces...
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