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New characterizing system for within-die delay variations of individual standard cells is presented. The proposed characterizing system is able to measure rising and falling delay variations separately by directly measuring the input and output waveforms of individual gate using an on-chip sampling oscilloscope in 65nm CMOS process. 7 types of standard cells are measured with 60 DUT's for each type...
To effectively reduce output ripple of switched-capacitor DC-DC converters which generate variable output voltages, a novel feedback control scheme is presented. The proposed scheme uses pulse density and width modulation (PDWM) to reduce the output ripple with low output voltage. The prototype chip was implemented using 65nm CMOS process. The switched-capacitor DC-DC converter has 0.2-V to 0.47-V...
In this paper, a 0.18-V input three-stage charge pump circuit applying forward body bias is proposed. In the developed charge pump, all the MOSFETs are forward body biased by using the inter-stage/output voltages. By applying the proposed charge pump as the startup in the boost converter, the lower kick-up input voltage of the boost converter can be achieved. To verify the circuit characteristics,...
An EMI Camera LSI (EMcam) with a 12 × 4 on-chip 250μm × 50μm loop antenna matrix in 65nm CMOS is developed. EMcam achieves both the 2D electric scanning and 60μm-level spatial precision for the first time. The down-conversion architecture increases the bandwidth of EMcam and enables the measurement of EMI spectrum. Shared IF block scheme is proposed to alleviate the increasing power and area penalty...
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