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Precise and accurate logic diagnosis for integrated circuits enables fast analysis of defect locations and their corresponding behaviors that leads to valuable feedback for achieving fast yield ramp-up. However during large-volume production, limited tester time or memory restrict the amount of data that can be recorded for each failing chip, thus making diagnosis more difficult. To help mitigate...
Test selection aims at achieving high test quality with low test cost. By selecting only a subset of tests that most effectively detect defects, test time can be reduced while ensuring test escape is minimized. In this work, a new one-pass test-selection method is described that efficiently identifies tests that maximize either fault-model coverage or an N-detect test metric. The proposed method analyzes...
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