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The transistor dimensions of devices in MOS based circuit highly influence the circuit characteristics and evaluation parameters. Choosing the dimensions while being critical is also extremely complex primarily due to complex mathematical formulations at the submicron level. Thus, it is required to employ techniques to simplify the dimensioning process while still keeping the parameters under check...
In this paper, a new positive feedback source-coupled logic (PFSCL) style with higher speed than the existing PFSCL style is proposed. The proposed logic style replaces the load in existing PFSCL with a new load which exhibits capacitive coupling that enhances the switching speed of the circuits. The mechanism of capacitive coupling is modeled and its effect on the propagation delay is described....
In this paper, a new logic style named as MOS current mode logic with feedback is proposed as an alternative to conventional MOS current mode logic for implementing digital circuits operating at high frequencies. The proposed circuit style employs a positive feedback that enhances the switching speed of the circuit. The use of feedback reduces the number of transistors needed to implement the circuit...
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