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In this paper, a new topology for a third order quadrature oscillator (QO) using a new active element, voltage differencing buffered amplifier (VDBA) is proposed. The proposed QO topology is implemented using a meld of lossless and lossy integrators that produce sinusoidal oscillations equally spaced in time with phase shift of 90 degrees. The functionality of the proposed QO is verified with the...
This paper presents a MOS current mode logic (MCML) square root carry select adder (SQ-CSA) which can be used as an alternative to MCML ripple carry adder (RCA) when the number of bits in the input words is large. The proposed 16-bit MCML SQ-CSA has been implemented and simulated in PSPICE using TSMC 180 nm CMOS technology parameters. Its performance has been compared with 16-bit RCAs based on CMOS...
In this paper, low-power Multi-Threshold MOS Current Mode Logic (MT-MCML) asynchronous pipeline circuits have been proposed. The circuits employ the use of multiple threshold MOS transistors to reduce the supply voltage requirement thereby decreasing their power consumption. The proposed circuits have been implemented and simulated in PSPICE using 0.18 µm CMOS technology parameters. Their performance...
In this paper, a novel active shunt-peaked MOS Current Mode Logic (MCML) C-element for asynchronous pipelines has been proposed. The circuit is based on the technique of shunt-peaking. The proposed circuit has been developed and simulated in PSPICE using 0.18µm CMOS technology parameters. Its performance comparison with CMOS and conventional MCML C-element indicates that the proposed C-element achieves...
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