The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A mixer-first receiver design in 28-nm CMOS is discussed. An embedded 5-bit mixer digital-to-analog converter provides wideband tuneability to enhance device matching and, hence, suppress the multiple local oscillator (LO) harmonics as well as to improve the overall image rejection (IR) performance. Two-stage baseband amplifiers support a 50-MHz baseband bandwidth, which covers the entire channel...
A passive-mixer-first receiver design in 28 nm CMOS is presented where the front-end 5-bit mixer DAC provides a wide-band tuneable impedance match to suppress the LO leakage as well as to improve image rejection performance. Baseband LNA together with the AC-boosting compensation amplifier provides a 50MHz baseband bandwidth, which allows support for non-contiguous carrier aggregation for LTE. The...
This paper presents an entire receiver chain from RF to baseband with fully integrated self-calibration circuitries for suppressing the 2nd-order intermodulation (IM2) distortions in Homodyne receivers for multi-standard applications. All the potential sources for IM2 generation are identified and tackled independently in the proposed receiver by architectural and calibration techniques, which results...
This paper presents key design techniques and challenges in implementing one of the first integrated, energy-efficient 60 GHz transceivers including baseband circuitry. The 90 nm CMOS direct-conversion design operates from a 1.2 V supply and has been optimized for 5-to-10 Gb/s QPSK modulation centered at 60 GHz. To achieve power consumption of 170 mW in transmit mode and 138 mW in receive mode, this...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.