The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper describes a 250-Mb/s to 3Gb/s continuous rate clock and data recovery (CDR) circuit in the TSMC 90nm CMOS process. The circuit first recovers the precise clock frequency from bit-serial 27−1 pseudorandom binary-sequences (PRBS) across a wide range of data rates. Thus, the requirements for loop bandwidth and locking range is much relaxed for the second step of phase detection, implemented...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.