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Through Silicon via (TSV) technology makes the stacked chip to achieve the shortest distance of interconnection in vertical direction (z direction). However, there are many challenges for TSV wafer processes. One of the challenges is TSV wafer backside grinding process. In this paper, a predictive model was introduced to calculate the normal grinding force, and a dynamic finite element modeling methodology...
Three-dimensional (3D) integrated circuit (IC) technology is considered as the preferred More-than-Moore approach due to its capabilities of miniaturization, high density and multi-function. And through silicon via (TSV) is the key enabling technology of 3D integration. So now TSV is getting more and more attention. However, TSV manufacturing processes are still facing several challenges, one of which...
Through Silicon Via (TSV) has emerged as a good solution to provide high density interconnections in three-dimensional packaging interconnect technologies. However, the thermal-mechanical reliability is a big issue. When the TSV is subjected to thermal load, large stress and strain would be created at the interface of the materials because of the great mismatch of CTE. In this paper, an axi-symmetric...
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