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End-to-end latency is critical to many distributed applications and services that are based on computer networks. There has been a dramatic push to adopt wireless networking technologies and protocols (such as WiFi, ZigBee, WirelessHART, Bluetooth, ISA100.11a, etc.) into time-critical applications. Examples of such applications include industrial automation, telecommunications, power utility, and...
Rapid evaluation of design metrics is essential for hardware-software co-design of hybrid systems on FPGAs. However, acquisition of design metrics from high-level programs is costly and/or time-consuming, and this prohibits rapid design space exploration. We will present a rapid area-time estimation technique that is capable of obtaining hardware design metrics of all the functions of the given C-based...
Advancement in design tools is necessary to bridge the widening productivity gap between hardware design and software development in state-of-the-art Field Programmable Gate Arrays (FPGA). We present a design exploration framework that automatically compiles C applications to realize efficient custom co-processor structures for hardware acceleration on the reconfigurable logic. We show that the proposed...
Modern FPGA devices can implement a variety of processors with numerous configurable options. Rapid performance estimation of FPGA processors plays a vital role in embedded systems design to select a processor that best fits the application requirements. Traditional performance evaluation techniques such as running the software application on the target processor or using cycle accurate instruction...
Wireless sensor networks (WSN) are getting increasingly attractive as a means to bridge between the physical and the virtual world. The current trends in communication see vast advances in wireless connectivity, leading to dynamic and complicated systems on top of which applications must be built. The task of designing these applications with such systems thus becomes much more complex. One common...
The boosting algorithm which we introduce is a representational ensemble classification methodology. It is well known that the boosting algorithm can improve the accuracy of any given learning algorithm and train the strong classifiers efficiently. A specific embedded hardware is designed for target identification task. This paper also evaluates the performance and implementation issues for the boosting...
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