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Nowadays, traditional ASIC design methodology shows its limitations to meet the short time-to-market which is the hallmark of modern consumer electronic products, and great interests have been focused on high-level synthesis (HLS) in the past two decades. In this paper, the scheme for generation of the memory architecture in a novel HLS method named operator design methodology is proposed. The principle...
Traditional IC design methodology based on standard cells shows its limitation on design efficiency, which can not satisfy the needs for shorter time-to-market and more advanced functionality of IC products. To solve this problem, a novel high level synthesis method named operator design method is proposed. In this paper, a scheduling scheme to timing optimization for operator design method is proposed,...
Nowadays, with the processing technology of integrated circuits(IC) developing into deep sub-micron size and the scale of IC running into VLSI, the existing IC design methodology can hardly meet the demands for short time-to-market and continuous increasing functionality of IC products. Facing with these challenges, researchers all around the world have been chasing rapid design methods such as reconfigurable...
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