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A new semiconductor-controlled rectifier (SCR) is proposed and realised in the foundry 0.18 m CMOS process for electrostatic discharge (ESD) protection. Without using an extra mask or trigger circuits, the new p-type lightly-doped-drain and n-type halo (NHALO) assisted SCR has a trigger voltage as low as 7 V and an ESD robustness exceeding 50 mA/ m to provide an effective protection. Compared with...
A new silicon-controlled rectifier (SCR) is proposed and realized in the foundry's 0.18-mum CMOS process for electrostatic discharge (ESD) protection. Without using an extra mask or trigger circuits, the new n-type lightly doped drain and p-type halo-assisted SCR has a trigger voltage Vt1 as low as 7 V and an ESD robustness exceeding 50 mA/mum, which enables effective ESD protection. Compared with...
A 1024-bit, 1/2-rate fully parallel low-density parity-check (LDPC) code decoder has been designed and implemented using a three-dimensional (3D) 0.18 mum fully depleted silicon-on-insulator (FDSOI) CMOS technology based on wafer bonding. The 3D-IC decoder was implemented with about 8M transistors, placed on three tiers, each with one active layer and three metal layers, using 6.9 mm by 7.0 mm of...
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