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Recently, researchers are targeting low-power consumption, and integrating more blocks on-chip. This paper proposes a 1GS/s 6-bit time-based analog-to-digital converter (T-ADC) for front-end receivers. This T-ADC eliminates the preprocessing analog blocks, and reduces power consumption by removing the power-hungry sample and hold circuit. A prototype of the proposed T-ADC is implemented in 65nm CMOS...
Analog-to-Digital Converters (ADCs) are essential blocks in digital signal processing (DSP) systems, software defined radio receivers (SDRs), and portable data acquisition systems. This paper introduces an 8-bit Time-based Analog to Digital Converter (T-ADC). This T-ADC utilizes an inherited sample and hold required to eliminate the dedicated power hungry sample and hold circuit. Moreover, a new design...
An ultra-low power voltage-to-time converter (VTC) circuit is proposed. The VTC circuit is compatible with wide range of applications (i.e. sensors, integrated DC-DC voltage converters) especially for time-based analog-to-digital converters (T-ADCs). In T-ADCs, the input voltage signal is first converted into a delay pulse using the VTC circuit, then this delay signal is converted into a digital code...
Analog-to-Digital Converters (ADCs) are essential blocks in digital signal processing systems, software defined radio receivers, and biomedical systems. This paper introduces a 6-bit Delay Line based Analog to Digital Converter (DL-ADC). This DL-ADC utilizes an inherited sample and hold technique to eliminate the dedicated power hungry sample and hold circuit. A prototype of the proposed DL-ADC is...
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