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During physical synthesis, global placement produces a solution where cells are overlapped or misaligned with respect to circuit sites and rows. Therefore, a legalization step relocates a subset of cells in order to satisfy a set of legality constraints. Although several techniques have been proposed to solve the legalization problem, they were designed without considering parallelization. This work...
The power consumption of High Performance Computing (HPC) systems is an increasing concern as large-scale systems grow in size and, consequently, consume more energy. In response to this challenge, we propose two variants of a new energy-aware load balancer that aim at reducing the energy consumption of parallel platforms running imbalanced scientific applications without degrading their performance...
Thread mapping has been extensively used as a technique to efficiently exploit memory hierarchy on modern chip-multiprocessors. It places threads on cores in order to amortize memory latency and/or to reduce memory contention. However, efficient thread mapping relies upon matching application behavior with system characteristics. Particularly, Software Transactional Memory (STM) applications introduce...
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