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An embedded 1 Mbit 2T1C gain-cell memory macro using indium-gallium-zinc oxide semiconductor FETs (OSFETs) with an extremely low off-state current of less than 1 zA (10−21 A) was fabricated. In the 2T1C gain cell, an OSFET for the write operation was stacked over a SiFET for the read operation. The 1 Mbit macro was fabricated using a combination of 60-nm OSFET and 65-nm CMOS processes. It achieves...
A 16-level cell is demonstrated using a test chip of nonvolatile oxide semiconductor RAM comprising c-axis aligned crystalline In-Ga-Zn oxide FETs. A read circuit composed of voltage followers outputs a read voltage with a maximum distribution of 37 mV. A single voltage follower has a maximum distribution of the read voltage of 25.3 mV. A 200 ns write time of the test chip is demonstrated.
As the number of devices connected to the Internet increases, servers and mobile devices must process increasingly large volumes of data, and also accommodate the increasing demand for high-speed and large-capacity working memory keeping the power consumption low. This need is being fulfilled by emerging devices, such as resistive RAM, phase-change RAM, and MRAM [1], which realize high-speed, high-density...
A 3bit/cell nonvolatile oxide semiconductor RAM (NOSRAM) test die comprising c-axis aligned crystal In-Ga-Zn-O TFTs has been fabricated. The write time of the test die is 100 ns. The test die collectively reads multilevel data within 900 ns with a 3bit A/D converter serving as reading circuit. The endurance of the 3bit/cell NOSRAM cell is more than 1012 cycles.
We fabricated a dynamic random access memory (DRAM) using crystalline oxide semiconductor (OS) transistors and not requiring refresh for more than ten days. We call this memory a dynamic oxide semiconductor random access memory (DOSRAM). A crystalline oxide semiconductor is an In-Ga-Zn-oxide (IGZO) semiconductor and has a c-axis aligned crystal (CAAC) structure. A crystalline OS transistor has extremely...
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