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The current-splitting architecture for the current-steering DAC can reduce the area of the current source array greatly. A background calibration technique for current-steering digital-to-analog (DAC) with the current-splitting array is presented. The proposed calibration technique can eliminate mismatch errors for both the upper bits array and the lower bits array in the background. A 14-bit current-steering...
A Nyquist-rate time-interleaved current-steering digital-to-analog converter (DAC) with dynamic channel matching (DCM) is proposed. Thanks to the proposed Nyquist-rate time-interleaved architecture, the DAC can properly operate at more than 1GS/s for a near-Nyquist output signal. The key limitation of the time-interleaved architecture is the mismatches between channels. The proposed DCM method can...
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