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In this work, we are using voltage scaling to make the counter design as an energy efficient design. The 74163 counter is a 4-bit fully synchronous counter that is available in both TTL and CMOS logic families. In addition to performing the counting function, it can be cleared or loaded in parallel. It has been observed that when different powers have been measured at different frequencies and different...
In this work, we are using voltage scaling and frequency scaling. In voltage scaling, voltage is scaled from 3V to 1V, where intermediate values are 2.5V, 2V, 1.8V and 1.5V. In frequency scaling, frequency is scaled from 1 MHz to 1 THz, where intermediate values are 10 MHz, 100 MHz, 1 GHz, 10 GHz and 100 GHz. When we scale down device operating frequencies from 1THz to 1GHz, there is 72.9% reduction...
In this paper, we apply clock gating technique in Global Reset ALU design on 28nm Artix7 FPGA to save dynamic and clock power both. This technique is simulated in Xilinx14.3 tool and implemented on 28nm Artix7 XC7A200T FFG1156-1 FPGA. When clock gating technique is not applied clock power contributes 32.25%, 4.24%, 3.06%, 3.09%, and 3.09% of overall dynamic power on 100 MHz, 1 GHz, 10 GHz, 100GHz...
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