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This paper presents a novel statistical model to estimate the reliability and number of errors of hardware tasks running on partially reconfigurable FPGAs in harsh environments. The proposed model has been validated by means of fault injection. The obtained results endorsed by the 95% confidence interval reveal the high accuracy of the proposed reliability model.
Reconfigurable devices employed in safety-critical real-time applications ought to tolerate faults in a timely manner. Fault-tolerant schedulers can be used to guarantee both real-time and fault-tolerant behaviors of such systems. In this paper the effects of three real-time scheduling algorithms Earliest Deadline First (EDF), Least Laxity First (LLF), and Rate Monotonic (RM) enhanced by two fault...
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