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In a three-dimensional integrated circuit (3D IC) design, through-silicon-vias (TSVs) are used for data transfer across layers. However, TSVs act as obstacles during the stage of placement and routing and have a negative impact on chip yield. Therefore, TSV number minimization is an important topic for 3D IC design. In this paper, we point out that there often exist idle functional units and idle...
3D IC technology stacks multiple integrated chips and its application is more and more popular. Therefore, developing CAD tools for the requirement of 3D architecture becomes urgent and important. In this paper, we present an integer linear programming (ILP) model for the application of resource layer assignment in high level synthesis. Our objective is to minimize the number of signal through-silicon-vias...
Power gating is the most effective technique to reduce the leakage power of an idle functional unit. However, when the functional unit is turned on, a sudden discharge, called surge current, is induced. If too many functional units are turned on simultaneously, the instantaneous accumulated surge current may lead to the malfunction of the circuit. In this paper, we point out the high-level synthesis...
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