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Background: Domino logic is widely used in modern digital systems because of easy implementation with less number of transistors and high speed. The pre-charge and evaluation phases of the domino logic, leads to enormous transitions at the output. This switching of the output is undesirable as it leads to more dynamic power dissipation. Methods: This achieved by the using the structures such as True...
The constant delay (CD) logic makes high speed operation of the dynamic circuits possible. In the CD logic, the timing block plays a vital role as it helps in reduction of the evaluation time, by defining a small window width. This paper proposes a modified timing block which yields minimized area even while accomplishing the function. Use of the CD logic across cascaded stages employing the proposed...
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