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We report improved control over the quality and uniformity of CVD graphene devices through a novel fabrication technique. An overlying HSQ pinning dielectric is used to physically anchor and protect the graphene sheet, resulting in electron and hole motilities of 25 600 and 23 700 cm2/Vs, respectively, record-breaking values for CVD graphene devices. Transitioning from traditional 3-D bulk materials...
This paper presents a uniform interconnect-centric benchmarking for three spintronic devices that are based on spin diffusion, spin hall effect, and domain wall motion, respectively. Key design parameters, i.e. number of repeaters and magnitude of supply voltage, are optimized to reduce delay and energy-delay product (EDP). All-spin logic devices show the best delay at short interconnect lengths,...
In this paper, graphene interconnects are analyzed based on realistic circuits in terms of multiple material properties, such as the mean free path, the contact resistance, and the edge roughness. The benchmark against conventional copper wires shows that the advantage of graphene usage occurs only under certain circumstances. The device-level parameters, including the supply and threshold voltages,...
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