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The Student Research Preview (SRP) will highlight selected student research projects in progress. The SRP consists of 25 one-minute presentations followed by a Poster Session, by graduate students from around the world, which have been selected on the basis of a short submission concerning their on-going research. Selection is based on the technical quality and innovation of the work. This year, the...
In this paper, we present a 0.2–1.8-GHz digital-intensive receiver front-end using a voltage-controlled oscillator (VCO)-based analog-to-digital converter (ADC) running at 1.4 Gs/s in 90-nm CMOS. To improve the out-of-band rejection, we propose a second-order anti-aliasing Sinc filter that can be embedded in the ADC, which exploits the integrating nature of a VCO. the nonideal effect of the proposed...
This paper presents a digital-intensive RF sampling receiver composed of a noise-canceling bandpass low-noise amplifier (LNA) and an RF analog-to-digital converter (ADC) for multi-band multi-mode wireless communication. The proposed LNA employs an on-chip transformer to combine the outputs of a common-gate and a common-source LNA to reduce the noise figure and enhance the linearity, while providing...
This paper presents a bandpass ADC which exploits enhanced time-resolution of a deep submicron CMOS process. Unlike conventional bandpass ADCs that rely on voltage resolution and Gm-LC filters, the proposed ADC employs time-interleaved voltage-controlled oscillators that enable frequency tunable bandstop noise shaping property without a feedback loop. The ADC implemented in 65nm CMOS achieves SNR...
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