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This paper propose an efficient interconnect interface, which has been applied in reconfigurable multimedia system (REMUS). In order to achieve high performance of data share between multi cores, this interconnect interface applies overlapping operation mechanism in memory. Test of H.264 HiP (High Profile) decoding shows that the data exchange rate achieves a speedup of 285% compared with the AHB...
This paper proposes a novel technique of contexts (configure information) switch scheme in the loop pipeline, which effectively reduces the reconfigure time and speedup the application. The target architecture is an embedded coarse-grained reconfigurable processor, which consists of a general processor and a coarse-grained reconfigurable cell array (RCA). The technique focuses on the kernel loop body...
In battery-operated portable devices, battery lifetime maximization is one of the most important design goals. This paper addresses the problem of variable voltage scheduling on battery-powered multiprocessor distributed systems, with the goal of shaping the discharge current profile to extend battery lifetime. A critical-path based battery-aware task scheduling (CPbBATS) algorithm is proposed to...
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