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There is a large variety of multi- and many-core platforms but established design methodologies for such processor arrays are still missing. We propose the concept of virtual cellular machine as an architecture, which does not correspond necessarily to a physical device, built according to the specific requirements needed by the programmer. The features of a virtual cellular machine (processors, memories...
Unmanned Arial Vehicles (UAVs) require the development of some on-board safety equipments before inheriting the sky. An on-board collision avoidance system is being built by our team. Due to the strict size, weight, power, and costs constraints, visual intruder airplane detection is the only option. This paper introduces our visual airplane detector algorithm, which is designed to be operational in...
The ASIC implementation of a digital Cellular Visual Microprocessor architecture is introduced. The processor array is constructed of simple, locally interconnected 8 bit microprocessors, operating in an extended SIMD mode. The processor array can be equipped with on-chip photo diode array, using 3D integration technology.
A new emulated digital CNN Universal Machine chip architecture is introduced and the main steps of the design process are shown in this paper. One core processor can be implemented on 2 × 2 mm 2 silicon area with a 0.35 μm CMOS technology. Assuming an array of 24 processors on a chip, its speed is 1ns/virtual cell/CNN iteration with 12 bit precision. This enables the execution of...
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