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In this paper, a wide range and low power multi-rate receiver for DisplayPort Version 1.3 is proposed. In order to extend the bandwidth, a high speed AC coupled interconnect receiver comprising output compensated negative impedance and positive feedback techniques is introduced. Furthermore, the automatic bit-rate tracking scheme is used for clock and data recovery (CDR) to achieve wide data rate...
A differential AC coupled transceiver for high-speed and low-swing has been implemented in a 0.18µm CMOS process. The proposed architecture includes a pulse receiver and a broadband limiting amplifier to recover a NRZ signal from a 75fF capacitive coupled channel. The system works at 12Gb/s through 10cm FR4 printed circuit board interconnect, while dissipating only 13.5mW with a bit error rate less...
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