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Hand exoskeletons for rehabilitation usage are devices for helping the stroke patients who are suffering from hand function disabilities. The present hand exoskeleton devices are cumbersome and too big in size, and are inconvenient in patients' daily life because of lacking of portability and reliability. In this paper, a new type of portable hand exoskeleton device is proposed to solve such problems...
In this paper, we propose and investigate two novel applications of absorbing materials to suppress high-frequency couplings in high-speed interconnects. In the first application, absorbing materials are added to connector housing to reduce the noises caused by crosstalk and resonances. In the second application, a low-emission inductor is proposed by applying absorbing materials surrounding the body...
In PC/Server industry, simulation process is usually separated into pre-layout and post-layout phase. The pre-layout simulation focus in finding the solution space or choosing a better topology [1], [2]. For post-layout simulation, extracting 3 or 5 pairs of the channel model and conducting the simulation analysis is widely used. However, it requires a basic understanding of the layout. Otherwise...
Dual-stripline is widely used in the computer systems to save printed circuit board (PCB) cost and achieve more compact form factor. Many design parameters can affect the overall performance of the dual-striplines. In this paper, the optimization of the dual-stripline design is discussed in detail, such as stackup selection, component breakout, etc. Theory analysis as well as Three-Dimensional full-wave...
Channel noise scan (CNS) approach is proposed in this paper to efficiently analyse the potential VR-signal coupling issue in the post-layout printed circuit board (PCB) check and the post-silicon debugging of the platform development. CNS is based on a new simulation methodology that includes the whole PCB with signals, voltage regulator (VR) networks, and the interaction. A frequency domain indicator...
In this paper, channel noise scan approach (CNS) is proposed to efficiently analyze the potential VR-signal coupling issue in the pre-silicon design and the post-silicon debug of the platform development. CNS is based on a new simulation methodology that includes the whole PCB with signals, voltage regulator (VR) networks, and the interaction between the two. The goal of this simulation methodology...
In this paper, the signal integrity (SI) simulation and computer system electrical design flow is discussed. Traditionally, the SI analyses lead to a set of physical design rules that the printed-circuit board (PCB) and integrated circuit (IC) package designers rigorously follow in the layout to ensure the signaling performance meets the requirements. Such practice makes the signaling requirements...
This paper describes an intentionally added device coupling technique to minimize or even cancel far end crosstalk. Applications to a platform CPU package and socket co-design for both single ended and differential signaling are described. This work demonstrates that a careful design of purposely added coupling can result in a lowered far end crosstalk design.
In a server system, the switching voltage regulator (VR) noise coupled to the IO pins of the adjacent memory riser connector through the open air above the base board, and the link performance was impacted by the coupling. A simulation flow was developed to reproduce this EMI phenomenon. The flow first used electromagnetic field solvers to extract the VR related power network and the VR-IO coupling...
Noise caused by switching voltage regulator (VR noise) can have a big impact on system signal / power performance, leading to signal integrity (SI) / power integrity (PI) issues. This paper introduces systematic ways of reducing VR noise as well as VR noise analysis methods. And a real design case with VR noise issue is shared with simulation and measurement results.
The paper introduces the usage of the differential symmetry principle to minimize or even cancel differential crosstalk. Applications to a CPU socket with hexagonal pin map pattern and to an edge connector are described. It is shown how a careful consideration of pin location and differential pair orientation can result in a high signal density and low differential crosstalk design.
Dual-striplines are gaining popularity in the high-density computer system designs to save printed circuit board (PCB) cost and achieve smaller form factor. However, broad-side near-end/far-end crosstalk (NEXT/FEXT) between dualstriplines is a major concern that potentially has a significant impact to the signal integrity. In this paper, the broadside coupling between two differential pairs, and a...
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