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A low power and low phase noise phase-locked loop (PLL) is proposed in this paper to provide a quadrature millimeter-wave source for the 60GHz direct-conversion transceiver. An in-phase injection-coupled quadrature voltage controlled oscillator (IPIC-QVCO) [1] whose symmetric coupling structure is composed of four diode-connected transistors is implemented to optimize both phase noise and phase error...
A 60GHz receiver for 802.11ad application with superior performance in 90nm CMOS process, compared with prior arts in advanced processes, is proposed and realized. A 3-stage differential LNA achieves a gain of 19.8dB and a noise figure of 6dB in measurement, showing less than 0.3dB difference from simulation due to the elaborate consideration of parasitics. A baseband PGA with wideband and large gain...
A 60-GHz injection-locked frequency divider (ILFD) with quadrature outputs is designed in 90-nm CMOS technology. An adaptive-coupling scheme is proposed to enlarge the phase shift for a wide-band locking range. The measured results exhibit an input locking range of 12.1GHz or 20.5%from 52.7 to 64.8GHz at an incident power of 0dBm. The core circuit consumes 8.6mW from a 1.2V power supply and occupies...
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