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In this brief, a read-only-memoryless structure for binary-to-residue number system (RNS) conversion modulo $\{2^{n}\pm k\}$ is proposed. This structure is based only on adders and constant multipliers. This brief is motivated by the existing $\{2^{n}\pm k\}$ binary-to-RNS converters, which are particular inefficient for larger values of $n$ . The experimental results obtained for $4n$ and...
In this paper, a novel ROM-less RNS-to-binary converter is proposed, using a new balanced moduli set {22n −1, 22n + 1, 2n − 3, 2n + 3} for n even. The proposed converter is implemented with a two stage ROM-less approach, which computes the value of X based only in arithmetic operations, without using lookup tables. Experimental results for 24 to 120 bits of Dynamic Range, show that the proposed converter...
In this paper a new simulation environment for a virtual laboratory to educational proposes is presented. The Logisim platform was adopted as the base digital simulation tool, since it has a modular implementation in Java. All the hardware devices used in the laboratory course was designed as components accessible by the simulation tool, and integrated as a library. Moreover, this new library allows...
This paper proposes a unified architecture for designing Residue Number System (RNS) based processors for moduli sets with an arbitrary number of channels. Recently, new RNS moduli sets have been proposed in order to increase the dynamic range and reduce the width of the channels. The proposed architecture allows designing forward and reverse RNS converters, as well as the arithmetic operators of...
Recently new Residue Number Systems (RNS) moduli sets have been proposed in order to increase the dynamic range and reduce the width of channels, therefore, reducing the processing time and further exploiting the carry-free characteristic of the modular arithmetic. In this paper we propose improved units for addition, subtraction, and multiplication in RNS for modulo {2^n+-k}. With this work, the...
In this paper Residue Number Systems (RNS) conversion structures from Binary to RNS modulo {2n ± 3} are proposed. These structures are based on arithmetic calculations without the need for Lookup Tables as in the related art. Additionally, the required 4:2 and 3:2 Carry-Save Adders (CSA) modulo {2n ± 3} are also proposed. Experimental results obtained for an ASIC technology suggest that the presented...
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