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This paper discusses a framework to apply compute-intensive data transforms (codecs) to data flowing through a channel between a CPU and an FPGA kernel on a heterogeneous streaming system. Codecs such as parallel compression are applied to data across a PCI-express channel in real-time, aiming to increase the effective bandwidth by using spare resources in both software and hardware. Other codecs...
This work demonstrates the capabilities of a high-level synthesis tool-chain that allows the compilation of higher order functional programs to gate-level hardware descriptions. Higher order programming allows functions to take functions as parameters. In a hardware context, the latency-insensitive interfaces generated between compiled modules enable late-binding with libraries of pre-existing functions...
This paper presents the Forward Financial Framework (F^3), an application framework for describing and implementing forward looking financial computations on high performance, heterogeneous platforms. F^3 allows the computational finance problem specification to be captured precisely yet succinctly, then automatically creates efficient implementations for heterogeneous platforms, utilising both multi-core...
The Rhino Project is a response to the need for Software Defined Radio (SDR) platforms for training and research. Presented in this paper is a toolflow for rapidly prototyping SDR applications upon Rhino. This Toolflow allows for end-users to describe their SDR application in a high level manner and then take it through various levels of abstraction, validated at each transition point, with a resulting...
This paper provides a novel way of trading increased resource utilisation for decreased latency when computing a single Discrete Fourier Transform on the FPGA. Analysis conducted on the Cooley-Tukey FFT optimisation shows that it increases the number of operations in the critical path of the transform computation. Consequentially an algorithm is proposed which allows control over the degree to which...
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