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A digital integrated circuit for sub-nanosecond dead-time adjustment is designed and its operation principle is described. The designed dead-time adjustment circuit (DTAC) generates two complementary control signals for the FET switches used in synchronous switching DC-DC converters. The control signals are generated from a PWM signal that is provided at the input of the DTAC. The circuit is based...
This paper presents the system for the evaluation of operation of a depletion-mode silicon carbide (SiC) power junction field-effect transistor (JFET). The main part of the system is a dc-dc step-down converter which represents realistic operating conditions for the switching devices in a synchronous buck configuration. In order to test the importance of the dead-time value on the operation and efficiency...
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