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An essential part of the bachelor program in Electrical Engineering at the Katholieke Universiteit Leuven since many years is a number of design projects that teach the basics of electronics design engineering to our students. The major project consists of an academic-year-long design task that is carried out by a group of about 20 students. These students are trained to operate as a multidisciplinary...
This paper proposes a Volterra-enhanced model to evaluate the impact of substrate noise on CMOS regenerative comparators and on flash A/D converters. The presented approach initially extends the linear model of the non-uniform sampling (NUS) distortion of the comparator due to substrate noise, to include 2nd and 3rd order non-linearities. The effectiveness of the enhanced model is then evaluated by...
RF-powered wireless sensor networks demand for ultra-low-energy A/D converters. Such systems have specific requirements, like fast start-up time and supply voltage independence. The presented A/D converter is based on a digital phase locked loop. Two closely matched ring oscillators perform the analog to frequency conversion. The digital output is generated by an in-loop digital proportional-integral...
This paper presents a simulation model for fast and efficient prediction of the dynamic properties of high-resolution current-steering Digital-to-Analog converters. Current source mismatch, limited output impedance of the current sources and timing errors are taken into account in the simulation model. No assumptions about distributions are required for these parameters. Experimental results show...
In this paper a new methodology is proposed for automated generation of EMC-aware behavioral models. Tightening EMC regulations require elaborate testing and simulation of EMC susceptibility of analog circuits during the design stage. A classification strategy detects EMC-sensitive devices which allows us to incorporate a more elaborate device model when accuracy is needed due to rectification effects...
This paper analyses the sampling uncertainty in regenerative comparators due to substrate noise coupling and provides a model for the resulting sampling distortion power. The analysis identifies two contributors of the total sampling uncertainty: the input signal-dependent one and the substrate noise-related one. The two disturbances of the ideal operation of the sampling transistors cause a non-uniform...
Aggressive scaling to nanometer CMOS technologies causes both analog and digital circuit parameters to degrade over time due to die-level stress effects (i.e. NBTI, HCI, TDDB, etc). In addition, failure-time dispersion increases due to increasing process variability. In this paper an innovative methodology to simulate analog circuit reliability is presented. Advantages over current state of the art...
In this paper, three different types of frequently used antennas in passive RFID tags with different sizes are investigated for voltage scavenging application. Most critical is to create a minimum voltage at the antenna port. Therefore, using simulations with two software packages, CST and HFSS, a detailed explanation is presented of the induced voltage at the antenna port versus antenna length and...
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