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This letter reports on the spike anneal temperature influence on the retention time of 1T-dynamic random access memory cells using a single silicon-on-insulator transistor on ultrathin buried oxide wafers. A 20$^{\circ}{\rm C}$ temperature difference (from 1070$^{\circ}{\rm C}$ to 1050$^{\circ}{\rm C}$ ) in the peak process temperature during the spike anneal after the source/drain implantation...
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